1. Field of the Invention
This invention relates generally to a semiconductor memory device, and, more specifically, to provide a zero-enabled fuse-set to effectuate a reduced number of fuses in a semiconductor memory device.
2. Description of the Related Art
Modern integrated circuit devices are comprised of millions of semiconductor devices, e.g., transistors, formed above a semiconductor substrate, such as silicon. These devices are very densely packed, i.e., there is little space between them. Similarly densely packed electrically conducting lines may also be formed in the semiconductor substrate. By forming selected electrical connections between selected semiconductor devices and selected conducting lines, circuits capable of performing complex functions may be created. For example, bits of data may be stored by providing electrical current to a plurality of bit lines and an orthogonal plurality of word lines that may be electrically coupled to one or more capacitors in a semiconductor memory.
The semiconductor memory may be a dynamic random access memory, a flash memory, and the like. The semiconductor memory typically comprises an array of memory cells, address decoding circuitry for selecting one, or a group, of the memory cells for reading or writing data, sensing circuitry for detecting the digital state of the selected memory cell or memory cells, and input/output lines to receive the sensed data and convey that information for eventual output from the semiconductor memory. In many cases, the array of memory cells will be sub-divided into several sub-arrays, or subsets, of the complete collection of memory cells. For example, a semiconductor memory having 16 megabits (224 bits) of storage capacity may be divided into 64 sub-arrays, each having 256K (218) memory cells.
Flash memory (sometimes called “flash RAM”) is a type of non-volatile memory that can be erased and reprogrammed in units of memory called blocks. Other types of memory may be erased and rewritten in smaller units, such as units at the byte level, which is more flexible, but slower than the block operations of flash memory. Flash memory is commonly used to hold control code such as the basic input/output system (BIOS) in a personal computer. When BIOS needs to be changed (rewritten), the flash memory can be written in block (rather than byte) sizes, making it faster to update. Applications employing flash memory include digital cellular phones, digital cameras, LAN switches, computers, digital set-up boxes, embedded controllers, and other devices.
In various semiconductor devices such as memory devices, redundant elements are generally implemented for activation of these elements under certain conditions. For example, during testing or quality analysis performed on a device, various portions of the device may be found to have defects. Often, certain devices may have a limited number of defects wherein if a substantially small number of the defects are corrected, the memory device may not have to be scrapped, thereby enhancing yield during production of semiconductor devices. Memory devices are generally manufactured to have redundant memory elements that correspond to primary memory elements. In the event that a primary memory element is found to be defective, a corresponding redundant element is invoked for correcting the defect.
Generally, a dedicated match circuit is assigned for each of the redundant elements in a device. For example, a dedicated match circuit may exist for both the redundant row and the redundant column corresponding to memory locations in the memory device. These match circuits, which are designed to perform decoding of memory locations, may have spare elements, each of which may require associated fuse banks to enable the element during a repair procedure. State-of-the-art implementation of redundant elements generally involves matching addresses, where enable bits relating to the redundant elements are stored as discreet fuses within a fuse bank. Each fuse in the fuse bank may be dedicated to a corresponding redundant element. Each fuse bank defines the element match address in a binary form with a fixed number of fuses. Each fuse bank also contains one additional fuse to enable the bank to match a predetermined repair and memory address in a primary array of memory.
One problem with state-of-the-art redundancy systems includes the fact that a plurality of storage fuses are used to uniquely associate a given fuse bank with its repair address. These additional fuse elements call for the use of larger than desired use of semiconductor real estate. Additionally, each fuse may consume a finite amount of current. Therefore, state-of-the-art redundancy systems call for an inefficient amount of current usage and device layout real estate. For example, in a memory device of one gigabyte, implementation of state-of-the-art fuse bank systems call for an extra fuse (i.e., enable fuse) for each fuse bank. For example, for a group of 2000 fuse banks, the state-of-the-art fuse bank systems call for an additional 2000 extra fuses. This causes a use of undesirable amount of space that is required to accommodate the extra fuses, as well as adverse power consumption effects.
The present invention is directed to overcoming, or at least reducing, the effects of, one or more of the problems set forth above.